José Flich

J. Escudero-Sahuquillo, E. G. Gran, P. J. Garcia, J. Flich, T. Skeie, O. Lysne, F. J. Quiles and J. Duato

Efficient and Cost-Effective Hybrid Congestion Control for HPC Interconnection Networks

IEEE Transactions on Parallel and Distributed Systems

B. Bogdanski, B. D. Johnsen, S. Reinemo and J. Flich

Making the Network Scalable: Inter-Subnet Routing in InfiniBand

Proceedings from the 19th International Euro-Par Conference on Parallel Processing

J. Flich, T. Skeie, A. Mejía, O. Lysne, P. Lopez, A. Robles, J. Duato, M. Koibuchi, T. Rokicki and J. Sancho

A Survey and Evaluation of Topology Agnostic Routing Algorithms

IEEE Transactions on Parallel and Distributed Systems

S. R. Mocholi, J. Flich, A. Roca, S. Medardoni, D. Bertozzi, J. Camacho, F. Silla and J. Duato

Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems

IEEE Transactions on Computed Aided Design

J. Escudero-Sahuquillo, E. G. Gran, P. J. García, J. Flich, T. Skeie, O. Lysne, F. J. Quiles and J. Duato

Combining Congested-Flow Isolation and Injection Throttling in HPC Interconnection Networks

International Conference on Parallel Processing, ICPP 2011

F. O. Sem-Jacobsen, S. R. Mocholi and T. Skeie

IFDOR - Dynamic Rerouting On-Chip

Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip

S. R. Mocholi, J. Flich, A. Roca, S. Medardoni, D. Bertozzi, J. Camacho, F. Silla and J. Duato

Addressing Manufacturing Challenges With Cost-Efficient Fault Tolerant Routing

NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip

J. Flich, S. R. Mocholi, A. Roca and S. Medardoni

Routing Algorithms and Mechanisms

Designing Network On-Chip Architectures in the Nanoscale Era

S. R. Mocholi, S. Medardoni, J. Flich, D. Bertozzi and J. Duato

Efficient Implementation of Distributed Routing Algorithms for NoCs

IET Computers & Digital Techniques

T. Skeie, F. O. Sem-Jacobsen, S. R. Mocholi, J. Flich, D. Bertozzi and S. Medardoni

Flexible DOR Routing for Virtualization of Multicore Chips

International Symposium on System-on-Chip

S. R. Mocholi, C. Hernandez, J. Flich, F. Silla, J. Duato, S. Medardoni, D. Bertozzi, A. Mejía and D. Dai

Yield-Oriented Evaluation Methodology of Network-on-Chip Routing Implementations

SOC'09 Proceedings of the 11th international conference on System-on-chip

O. Lysne, J. M. Montanana, J. Flich, J. Duato, T. M. Pinkston and T. Skeie

An Efficient and Deadlock-Free Network Reconfiguration Protocol

IEEE Transactions on Computers

J. Flich, S. R. Mocholi, J. Duato, T. Sødring, Å. G. Solheim, T. Skeie and O. Lysne

On the Potential of NoC Virtualization for Multicore Chips

Scalable Computing: Practice and Experience

J. Flich, S. R. Mocholi and J. Duato

An Efficient Implementation of Distributed Routing Algorithms for NoCs

Second ACM/IEEE International Symposium on Networks-on-Chip, NoCS 2008

J. Flich, S. R. Mocholi, J. Duato, T. Sødring, Å. G. Solheim, T. Skeie and O. Lysne

On the Potential of NoC Virtualization for Multicore Chips

International Workshop on Multi-Core Computing Systems (MuCoCoS'08)

S. Reinemo, T. Skeie, A. Mejía, J. Flich and J. Duato

Boosting Ethernet Performance by Segment-Based Routing

Proceedings of the 15th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP 2007)

M. E. Gómez, N. A. Nordbotten, J. Flich, P. Lopez, A. Robles, J. Duato, T. Skeie and O. Lysne

A Routing Methodology for Achieving Fault Tolerance in Direct Networks

IEEE Transactions on Computers

A. Mejía, J. Flich, J. Duato, S. Reinemo and T. Skeie

Segment-Based Routing: an Efficient Fault-Tolerant Routing Algorithm for Meshes and Tori

20th IEEE International Parallel & Distributed Processing Symposium

G. Mora, J. Flich, J. Duato, P. Lopez and O. Lysne

Towards and Efficient Switch Architecture for High-Radix Switches

ACM/IEEE Symposium on Architectures for Networking and Communications Systems

O. Lysne, J. M. Montanana, T. M. Pinkston, J. Duato, T. Skeie and J. Flich

Simple Deadlock-Free Dynamic Network Reconfiguration

High Performance Computing - HiPC 2004: 11th International Conference, Bangalore, India, December 19-22, 2004