The mission of the Department of High-Performance Computing (HPC) is to enable high performance of computations in both traditional computational sciences and the resurgent field of machine learning and artificial intelligence.
The HPC team helps researchers who work in different branches of science adopt the latest computing platforms to address their challenging scientific questions. The team applies user-friendly programming and finds ways of using modern hardware platforms as efficiently as possible.
Department head
Focus areas
We are privileged to be able to work as a bridge between computational scientists and intimidating, fast-changing supercomputers.
Prof. Xing Cai, head of the HPC department
Lower the user threshold
High-Performance Computing team members investigate the best ways of programming the latest computing hardware, then, apply these methods as user-friendly software tools. Some of these are in the form of automated code generators – that is, a computer program that implements software code itself based on some inputs from the users. This allows scientists without training in advanced programming to easily translate their computational tasks into software code that can run efficiently on the latest hardware.
Optimize computational performance
During the development of software tools, the team experiments with strategies to maximise the potential of modern computing platforms. It is achieved by devising hardware-adapted or even hardware-inspired numerical algorithms, creating performance-enhancing data structures, and investigating software, middleware and hardware optimization techniques for the latest hardware platforms.
Efficiency in real-world applications
The team works side by side with domain scientists to ensure a smooth transition from small-scale academic tests to full-scale applications that will effectively use the hardware resources on modern supercomputers.
Exascale computing preparation
The Department of HPC operates a national e-infrastructure named eX3 (Experimental Infrastructure for Exploration of Exascale Computing), an extremely heterogeneous cluster of cutting-edge hardware components. Its purpose is to provide Norwegian researchers and their international collaborators with a unique testbed to experiment with various hardware technologies and the related software tools, for the purpose of adopting these in their research fields. In this way, the Norwegian research community will be better prepared for the upcoming era of exascale computing.
Feature: Preparing Norway for the next generation supercomputers
Key partners
People in HPC
Publications
Targeting performance and user-friendliness: GPU-accelerated finite element computation with automated code generation in FEniCS
Spillifisering for økt engasjement, fleksibilitet og alternativt læringsløp
Enabling unstructured-mesh computation on massively tiled AI processors: An example of accelerating in silico cardiac simulation
Detailed Modeling of Heterogeneous and Contention-Constrained Point-to-Point MPI Communication
Bringing Order to Sparsity: A Sparse Matrix Reordering Study on Multicore CPUs
SmartIO: Device sharing and memory disaggregation in PCIe clusters using non-transparent bridging
On memory traffic and optimisations for low-order finite element assembly algorithms on multi-core CPUs
ML Accelerator Hardware: A Model for Parallel Sparse Computations?
ML Accelerator Hardware: A Model for Parallel Sparse Computations?
Implementing Spatio-Temporal Graph Convolutional Networks on Graphcore IPUs
Impacts of Covid-19 on Norwegian salmon exports: A firm-level analysis
Host Bypassing: Let your GPU speak Ethernet