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J. D. Trotter, J. Langguth and X. Cai

Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix–vector multiplication

Journal of Parallel and Distributed Computing 144 (2020): 189-205.
Journal Article
2020
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Background

MSc Computational science and engineering
Department of Mathematics, University of Oslo
December 2012

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2020

Journal articles

J. D. Trotter, J. Langguth and X. Cai

Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix–vector multiplication

Journal of Parallel and Distributed Computing 144 (2020): 189-205.
Status: Published
2019

Talks, contributed

J. D. Trotter, X. Cai, S. W. Funke and J. Langguth

Compiling finite element variational forms for GPU-based assembly

In FEniCS‘19, Washington DC, USA, 2019.
Status: Published
2018

Posters

J. D. Trotter, J. Langguth and X. Cai

Quantifying data traffic of sparse matrix-vector multiplication in a multi-level memory hierarchy

London, UK, 2018.
Status: Published