Simula awarded five researcher projects for ICT renewal and development

These projects are funded through the funding scheme “Researcher projects for ICT Renewal and Development” (forskningsradet.no).

“It is fantastic to see such strong results for Simula. We look forward to seeing the important research and development that will emerge from these projects. Congratulations to all project managers and their teams on this achievement,” says Lillian Røstad, CEO of Simula.

Below are the summaries for each project.

DigiCells – Next-generation digital twins for biological cell environments

Project manager: Marie Rognes (Simula Research Laboratory)

Recent advances in imaging and computing have revolutionised how we study the structure and function of living systems. At the same time, rapidly growing volumes of bioimaging data have created a need for new solutions to analyse, integrate and interpret this information.

The DigiCells project aims to establish algorithmic and technological foundations for next-generation modelling and analysis of biological cell environments. By integrating geometric structure, biophysical dynamics and high-resolution imaging data, the project brings together scientific computing, machine learning, computational mathematics, bioimaging and biomedical research.

DigiCells will develop accurate and scalable multigrid algorithms that combine finite element methods with graph neural networks and neural operators. These methods will enable simulation and learning of complex biological interactions directly from imaging data. The project will demonstrate the technology through digital twins for cells-on-a-chip and for ionic processes in cardiology and neuroscience, and will distribute reusable open-source software through the FEniCS and Firedrake projects.

DRIVE – Brain-driven Remote Collaborative Physical Work

Project manager: Baltasar Beferull-Lozano (SimulaMet) 

DRIVE proposes a new concept for remote collaborative physical work by enabling bidirectional physical interaction through robotic avatars controlled by brain-driven networks and multi-sensor data.

The project aims to achieve full remote physical embodiment by ensuring timely haptic and visual feedback between human operators. Due to network and processing delays, fine-grained remote physical interaction is currently infeasible, even over short distances.

To address this, DRIVE will develop brain-machine interfaces that exploit brain signals related to future movement and cognitive state. These signals will be used to build predictive models that anticipate user actions and compensate for latency through adaptive control and networking algorithms. The project aims to enable new forms of remote physical collaboration, mediated by machines and accessible regardless of age, gender or physical condition.

NISQEC – Noisy Intermediate-Scale Quantum Error Correction

Project manager: Hsuan-Yin Lin (Simula UiB)

Quantum computers are expected to solve some complex problems more efficiently than classical computing, such as factoring large numbers in cryptography. The quantum revolution is slowly gathering pace, with the NISQ era playing an important stepping stone towards fully fault-tolerant quantum computing (FTQC). The "noisy" nature of NISQ systems presents a considerable challenge, as quantum information is notoriously error-prone when any quantum system interacts with its physical environment. These errors restrict the size of robust quantum systems that can be built unless quantum error correction (QEC) is employed to mitigate hardware noise. QEC is a crucial enabler, unlocking the commercial potential of various quantum technologies beyond FTQC, including quantum communications, quantum sensing and simulation, and quantum memories. Our project, Noisy Intermediate-Scale Quantum Error Correction (NISQEC), will advance QEC capabilities for the NISQ era.

The quality of QEC is characterized using two key metrics: code rate and error threshold. The code rate reflects the "cost" of a QECC by quantifying how many physical qubits are required to encode a certain number of information-carrying qubits. A higher code rate indicates more efficient storage and processing of quantum information. The other key metric, the error threshold, defines the maximum permissible physical error rate (the level of environmental noise) for which a QECC's LER outperforms the case without error correction. A higher error threshold of a QECC indicates better overall performance.

The NISQEC project aims to establish fundamental FBL coding limits on LER—or, equivalently, error threshold—for a variety of quantum noise models. By tackling challenges in both quantum and classical information encoding paradigms, we leverage our deep expertise in classical FBL IT and coding theory to develop rigorous theoretical bounds and practical, efficient coding schemes.

PREMAL – Practical Encrypted Machine Learning

Project manager: Håvard Raddum (Simula UiB) 

Machine learning has the potential to unlock new applications across many sectors, but its use on sensitive data is often constrained by privacy regulations and data-sharing concerns. Privacy-Preserving Machine Learning (PPML) aims to address these challenges.

PREMAL focuses on fully homomorphic encryption (FHE), which enables computations to be performed directly on encrypted data, ensuring that sensitive information is never exposed in plaintext. While promising, the practical use of FHE in machine learning remains limited.

The project aims to develop a comprehensive methodology for encrypted machine learning, addressing key gaps such as encrypted inference, training on encrypted data, and preventing data leakage in federated learning. The outcome will be machine learning systems with strong, built-in privacy protections suitable for real-world deployment.

UPS – Unlocking the Power of Spatial Computing using Tile-Centric AI Accelerators

Project manager: Johannes Langguth (Simula Research Laboratory) 

Tile-centric AI accelerators, such as Graphcore IPUs and Cerebras systems, represent a major recent development in computer hardware. These processors use on-chip SRAM to provide extremely low latency and high memory bandwidth, making them well suited for graph algorithms and other irregular, data-intensive workloads.

Despite their potential, programming such devices remains challenging, particularly due to diverse hardware designs and programming interfaces. This limits their adoption beyond standard deep learning applications.

The UPS project aims to address this challenge by developing a common framework of communication routines and graph primitives for tile-centric AI accelerators, similar to the role MPI played in making cluster computing widely accessible. The project combines theoretical work on spatial models of computation with practical benchmarking and low-level implementation, establishing a foundation for broader and more efficient use of these emerging architectures.