AuthorsJ. Flich, S. R. Mocholi and J. Duato
EditorsI. C. Society
TitleAn Efficient Implementation of Distributed Routing Algorithms for NoCs
AfilliationCommunication Systems, Communication Systems
StatusPublished
Publication TypeProceedings, refereed
Year of Publication2008
Conference NameSecond ACM/IEEE International Symposium on Networks-on-Chip, NoCS 2008
Pagination87-96
Date PublishedApril
PublisherIEEE Computer Society
ISBN Number0-7695-3098-2
Abstract

The design of NoCs for multi-core chips introduces new design constraints like power consumption, area, and ultra low latencies. Although 2D meshes are preferred, heterogeneous blocks, fabrication faults, reliability issues, and chip virtualization may lead to the need of irregular topologies or regions. In this situation, efficient routing becomes a challenge. Although the use of routing tables at switches is flexible, it does not scale in terms of latency and area due to its memory requirements. LBDR (logic-based distributed routing) is proposed as a new routing method that removes the need of using routing tables at all. LBDR enables the implementation of many routing algorithms on most of the practical topologies we might find in the near future in a multi-core system. From an initial topology and routing algorithm, a set of three bits per switch/output port is computed. Evaluation results show that, by using a small logic, LBDR mimics the performance of routing algorithms when implemented with routing tables, both in regular and irregular topologies.

DOI10.1109/NOCS.2008.4492728
Citation KeySimula.simula.522