AuthorsF. O. Sem-Jacobsen, S. R. Mocholi, A. Strano, T. Skeie, D. Bertozzi and F. Gilabert
TitleEnabling Power Efficiency Through Dynamic Rerouting On-Chip
AfilliationCloud, Communication Systems
StatusPublished
Publication TypeJournal Article
Year of Publication2013
JournalACM Transactions on Embedded Computing Systems
Volume12
Number4
Date PublishedJune
PublisherACM
Abstract

Networks-on-chip (NoCs) are key components in many-core chip designs. Dynamic power-awareness is a new challenge present in NoCs that must be efficiently handled by the routing functionality as it introduces irregularities in the commonly used 2-D meshes. In this article, we propose a logic-based routing algorithm, iFDOR, oriented towards dynamic powering down one region within every application partition on the chip through dynamic rerouting, with low implementation costs. Results show that we can successfully shutdown an arbitrary rectangular region within an application partition without significant impact on network performance.

Citation KeySimula.simula.764