AuthorsF. O. Sem-Jacobsen, S. R. Mocholi and T. Skeie
EditorsJ. Flich and D. Bertozzi
TitleIFDOR - Dynamic Rerouting On-Chip
Afilliation, Communication Systems
StatusPublished
Publication TypeProceedings, refereed
Year of Publication2011
Conference NameProceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip
Pagination11-14
Date PublishedJanuary
PublisherACM
Place PublishedNew York, USA
ISBN Number978-1-4503-0272-2
Abstract

Many-core chip design requires flexible routing solutions for the interconnect to handle faults, provide performance partitions, and react to dynamic changes in processing requirements and power/heat distribution. We have developed a logic based rerouting mechanism suitable for tolerating dynamic powering down of regions within the application partition on the chip. This mechanism is combined with the logic based FDOR routing algorithm to create a powerful routing algorithm with low implementation cost. This allows for higher system utilisation through enabling more efficient power management as well as supporting many irregular mesh topologies through flexible virtualisation. Results show that powering down a single switch results in an 8% throughput reduction in the worst case for the evaluated topology.

Citation KeySimula.simula.504