Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix–vector multiplication
- Authors
- J. D. Trotter, J. Langguth and X. Cai
- Status
- Published
- Publication type
- Journal Article
- Year of publication
- 2020
- Journal
- Journal of Parallel and Distributed Computing
- Publisher
- Elsevier
- Citation key
- 15800